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CHA2190
20-30GHz Low Noise Amplifier
self biased GaAs Monolithic Microwave IC Description
The circuit is a two-stages self biased wide band monolithic low noise amplifier.
The circuit is manufactured with a standard HEMT process : 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in chip form.
18 14 10
Main Feature
dBSij & NF ( dB )

Broad band performance 20-30GHz 2.2dB noise figure 15dB gain, 0.5dB gain flatness Low DC power consumption, 50mA 20dBm 3rd order intercept point Chip size : 1.670 x 1.03x 0.1mm
6 2 -2 -6 -10 -14 -18 -22 -26 14 16 18 20 22 24 26 28 30 32 34 36
dBS11
dBS21
dBS22
NF
Frequency ( GHz )
Main Characteristics
Tamb = +25C Symbol NF G G Parameter Noise figure at freq : 40GHz Gain Gain flatness
On wafer typical measurement
Min
Typ 2.2
Max 3
Unit dB dB
13
15 .0.5 1
dB
ESD Protections : Electrostatic discharge sensitive device observe handling precautions !
Ref : DSCHA21902036 -05-Feb.-021/9 Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Route Departementale 128 - B.P.46 - 91401 Orsay Cedex France Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2190
Electrical Characteristics
Tamb = +25C, Vd = +4V (On wafer) Symbol Fop G G NF VSWRin VSWRout IP3 P1dB Id Parameter Operating frequency range Gain (1) Gain flatness (1) Noise figure (1) Input VSWR (1) Ouput VSWR (1) 3rd order intercept point
20-30GHz Low Noise Amplifier
Min 20 13
Typ
Max 30
Unit Ghz dB
15 0.5 2.2 1 3 3.0:1 3.0:1 20 11 50 70
dB dB
dBm dBm mA
Output power at 1dB gain compression (2) Drain bias current (3)
(1) These values are representative of wafer measurements without bonding wire at the RF ports. (2)This value is a typical value when Vd=4V Vg1=Vg2=0V or not connected and can be increased See chip biasing option page 8 (3) This current is the typical value for low noise and low current consumption biasing : Vd=4V , Vg1=Vg2=0V or not connected.
Absolute Maximum Ratings (4)
Tamb = +25C Symbol Vd Vg Pin Top Tstg Parameter Drain bias voltage (6) Vg1 and Vg2 max Maximum peak input power overdrive (5) Operating temperature range Storage temperature range Values 4.5 +1 15 -40 to +85 -55 to +125 Unit V V dBm C C
(4) Operation of this device above anyone of these paramaters may cause permanent damage. (5) Duration < 1s. (6) See chip biasing options page 8/9
Ref :
DSCHA21902036 -05-Feb.-02-
2/9
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
20-30GHz Low Noise Amplifier
Typical Results
Chip Typical Response ( On wafer Scattering parameters ) : Tamb = +25C Vd=4V Id=+50mA
CHA2190
Freq GHz
2.00 5.00 8.00 9.00 10.00 11.00 12.00 13.00 14.00 15.00 16.00 17.00 18.00 19.00 20.00 21.00 22.00 23.00 24.00 25.00 26.00 27.00 28.00 29.00 30.00 31.00 32.00 33.00 34.00 35.00 36.00 37.00 38.00 39.00 40.00
dBS11 mod. dB
-0.37 -0.53 -0.59 -0.66 -0.79 -1.00 -1.26 -1.33 -1.39 -1.79 -3.06 -5.59 -9.90 -13.09 -14.29 -14.48 -14.71 -14.92 -15.42 -16.38 -16.55 -16.33 -14.66 -13.19 -11.49 -10.10 -8.49 -7.01 -5.76 -4.56 -3.67 -3.02 -2.57 -2.18 -1.82
PS11 pha. deg.
-74.86 -151.19 157.19 141.20 125.32 109.39 93.11 73.86 52.92 26.36 -7.27 -46.11 -88.64 -132.63 -179.39 143.23 118.23 100.80 87.80 78.89 77.15 77.12 71.74 61.95 46.38 25.97 1.99 -24.08 -50.88 -78.91 -103.63 -125.99 -146.23 -162.01 -178.56
dBS12 mod. dB
-70.84 -61.97 -63.84 -64.59 -62.91 -62.00 -61.10 -54.13 -45.84 -41.70 -38.40 -36.52 -34.29 -34.84 -34.82 -34.24 -33.88 -33.65 -32.93 -32.22 -31.63 -30.73 -30.72 -29.96 -29.74 -29.29 -29.08 -29.25 -28.83 -29.98 -31.24 -31.84 -35.07 -35.66 -36.87
PS12 pha. deg.
-53.91 -91.19 -162.71 167.32 152.65 165.51 65.75 -36.78 -88.69 -126.55 -159.80 168.18 139.94 112.28 93.31 79.42 62.77 47.72 34.93 20.45 3.26 -11.52 -31.79 -45.41 -65.11 -84.32 -104.88 -127.09 -147.90 -177.63 165.34 144.11 127.07 98.71 109.75
dBS21 mod. dB
-29.15 -54.49 -21.34 -14.41 -7.52 -1.20 4.21 8.62 12.13 14.89 16.82 17.53 17.39 16.98 16.44 15.90 15.50 15.38 15.30 15.22 15.22 15.24 15.28 15.27 15.22 15.13 14.92 14.46 13.73 12.61 11.09 9.30 7.29 5.36 3.19
PS21 pha. deg.
56.50 149.52 -178.25 176.87 163.27 140.92 111.98 79.00 43.65 7.60 -31.20 -68.31 -102.75 -131.32 -156.45 -179.20 160.71 141.01 121.05 101.34 81.83 61.81 41.14 20.38 -1.31 -23.85 -47.58 -72.54 -98.45 -124.59 -149.58 -173.89 163.92 143.17 121.75
dBS22 mod. dB
-2.03 -4.15 -5.97 -6.38 -7.07 -8.02 -9.38 -11.25 -14.06 -16.84 -19.09 -17.25 -16.27 -17.29 -18.70 -21.00 -20.27 -20.10 -17.74 -16.09 -14.40 -13.10 -12.13 -11.55 -11.52 -11.39 -12.30 -13.60 -16.45 -22.00 -20.99 -17.26 -12.77 -10.42 -8.88
PS22 pha. deg.
-84.36 -155.38 161.51 149.74 136.72 124.05 111.29 101.00 92.70 90.96 106.80 106.98 97.39 75.43 49.82 23.10 -12.66 -51.60 -76.68 -98.65 -114.01 -131.22 -145.23 -159.84 -175.03 171.38 155.28 135.95 111.53 75.08 -22.73 -69.71 -88.90 -108.31 -119.32
Ref : DSCHA21902036 -05-Feb.-02-
3/9
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2190
Typical Results
20-30GHz Low Noise Amplifier
Typical Gain , Matching and Noise Figure (On wafer Measurements)
Tamb = +25C Vd = 4V Vg1 and Vg2 non connected; Id = 50mA Typical gain slope versus temperature : -0.025dB/C Typical noise figure slope versus temperature : 0.011dB/C
18 14 10 dBS21 & NF ( dB ) 6 2 -2 -6 -10 -14 -18 -22 -26 14 16 18 20 22 24 26 28 30 32 34 36 Frequency ( GHz )
Chip Typical Response (In test Jig )
dBS21 NF dBS11 dBS22
18 14 10 2 -2 -6 -10 -14 -18 -22 -26 RLosses(dB)
120 100
Gain: Vd=4V Vg2=-1V
6
24 22 20 18 16 14 12 10 8 6 4 2 0 18
Gain: Vd=4.5V Vg2=+1V
Gain: Vd=4V
Ga / NF (dB)
80
Id( Vd=4.5V Vg2=+1V) Id (Vd=4V) Id (Vd=4V Vg2=-1V)
60 40
NF : (all biasing options)
20 0 20 22 24 26 28 30 32 34 36 Frequency (GHz)
Ref :
DSCHA21902036 -05-Feb.-02-
4/9
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
Id (mA)
20-30GHz Low Noise Amplifier
Circuit typical response (In test-Jig):
Power measurements (Vd=4V)
21 19 Gain (dB) 17 15 13 11 -20 -18 -16 -14 -12 -10 -8 -6 -4 -2
GAIN dB(20GHz) GAIN dB(24GHz) GAIN dB(28GHz) GAIN dB(30GHz) GAIN dB(32GHz) POUT dBm (20GHz) POUT dBm (24GHz) POUT dBm (28GHz) POUT dBm (30GHz) POUT dBm (32GHz)
CHA2190
15 13 9 7 5 3 1 -1 -3 -5 0 Input Power (dBm) Output Power(dBm)
Id (mA)
11
Typical Output Power (Measurement in test Jig)
40 36 P-1dB (dBm) / Gain (P-1dB) dB
Id
80
(Vd=4.5V Vg2=+1V
70 60
32
Id
(Vd=4V)
28 24 20 16 12 8 4 0 18
Id
(Vd=4V vg2=-1V
50 40
Gain P-1dB (Vd=4.5V Vg2=+1V)
Gain P-1dB (Vd=4V)
30 20 10
Gain P-1dB (Vd=4V Vg2=-1V)
P-1dB (Vd=4.5V Vg2=+1V) P-1dB (Vd=4V) P-1dB (Vd=4.5V Vg2=+1V)
0 -10 -20
19
20
21
22
23
24 25 26 27 Frequency (GHz)
28
29
30
31
32
Tamb = +25C
These values are representative of the package assembly with input and output bonding.
Typical Output power -1dB for typical biasing
Ref : DSCHA21902036 -05-Feb.-025/9 Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2190
Mechanical data
20-30GHz Low Noise Amplifier
Chip schematic and Pad Identification
Pad Size :100/100m, chip thickness 100um
Dimensions : 1670m x 1030m 35m
6/9
Ref :
DSCHA21902036 -05-Feb.-02-
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2190
Typical Chip Assembly
20-30GHz Low Noise Amplifier
- * Nominal Input and Output bonding lenght :0.3 to 0.38nH for one 25m bond wire. - Chip backside is DC and RF grounded
Ref :
DSCHA21902036 -05-Feb.-02-
7/9
Specifications subject to change without notice
United Monolithic Semiconductors S.A.S.
Route Departementale 128 - B.P.46 - 91401 Orsay Cedex France Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
CHA2190
Chip Biasing options
20-30GHz Low Noise Amplifier
Internal DC schematic
This chip is self-biased, and flexibility is provided by the access to positive Vg. The internal DC electrical schematic is given in order to use these pads in a safe way.
Absolute recommandations: N1 : Do not exceed Vds = 3.5 Volt ( Vds: internal Drain to Source voltage ). N2 : Do not bias in such a way that Vgs* becomes positive. (Vgs :internal Gate to Source voltage )
Typical biasing table and Typical results in test Jig at 40 GHz
40GHz IN TEST Jig
Standard Low Noise High linearity Low noise /low current consumption Switch off Vds ( V) Vg1 (V) 4 4.5 4 3.5 NC NC NC -1 Vg2 (V) NC 1 -1 -8 Id (mA) 50 60 40 0 Typical NF(dB) Typical Gain (dB) Typical P-1dB (dB) Typical Psat (dB) 2.2 2.2 2.2 X 15 15 15 X 11 12 9.5 X 13 14 12 X
Ref :
DSCHA21902036 -05-Feb.-02-
8/9
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09
20-30GHz Low Noise Amplifier
CHA2190
Ordering Information
Chip form : CHA2190-99F/00
Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S.
Ref : DSCHA21902036 -05-Feb.-02-
9/9
Specifications subject to change without notice
Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09

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